1. Field of the Invention
The present invention relates to an image display apparatus and a driving method of the image display apparatus and can be applied to, for example, an active matrix image display apparatus using organic EL (Electro Luminescence) devices. According to the present invention, when fluctuations in threshold voltage of a driving transistor are corrected by setting a scanning line to output a driving signal for power supply to a floating state to discharge an inter-terminal voltage of holding capacity in a plurality of periods via the driving transistor in the entire period or a partial period of pauses of threshold voltage correction processing, fluctuations in threshold voltage of the driving transistor can reliably be corrected.
2. Description of the Related Art
In recent years, active matrix image display apparatuses using organic EL devices have actively been developed. Here, an organic EL device can be driven with an applied voltage of 10 [V] or less. Thus, this type of image display apparatus can reduce power consumption. Moreover, an organic EL device is a self-luminous device. Therefore, this type of image display apparatus does not need a backlight apparatus so that the image display apparatus can be made lighter and thinner. Further, the organic EL device is characterized by a quick response speed of about several μsec. Therefore, this type of image display apparatus is characterized in that an afterimage rarely persists during display of moving images.
More specifically, in an active matrix image display apparatus using organic EL devices, pixel circuits including organic EL devices and driving circuits driving organic EL devices are arranged in a matrix form to form a display unit. This type of image display apparatus displays a desired image by driving each pixel circuit by a signal line driving circuit and a scanning line driving circuit arranged around the perimeter of the display unit via a signal line and a scanning line, respectively, provided in the display unit.
As to an image display apparatus using the organic EL device, Japanese Patent Application Laid-Open No. 2007-310311 discloses a configuration in which two transistors are used to form a pixel circuit to prevent fluctuations in threshold voltage of driving transistors that drive the organic EL device and quality deterioration due to fluctuations in mobility.
Here, FIG. 8 is a block diagram showing an image display apparatus disclosed by Japanese Patent Application Laid-Open No. 2007-310311. This image display apparatus 1 is an image display apparatus using organic EL devices and a display unit 2 is created on an insulating substrate such as glass. The image display apparatus 1 has a signal line driving circuit 3 and a scanning line driving circuit 4 created around the perimeter of the display unit 2.
Here, the signal line driving circuit 3 outputs a driving signal Ssig for signal line to a signal line DTL provided in the display unit 2. More specifically, after image data D1 input in order of raster scanning is latched sequentially and distributed to the signal line DTL by a horizontal selector (HSEL) 3A, the signal line driving circuit 3 performs digital/analog conversion processing on each image data D1. The signal line driving circuit 3 processes a digital/analog conversion result to generate the driving signal Ssig. The image display apparatus 1 thereby sets a gradation of each pixel circuit 5 in accordance with, for example, a so-called line sequence.
The scanning line driving circuit 4 outputs a write signal WS and a driving signal DS to a scanning line WSL for write signal and a scanning line DSL for power supply provided in the display unit 2, respectively. Here, the write signal WS is a signal to exercise ON/OFF control of a write transistor provided in each pixel circuit 5. The driving signal DS is a signal to control the drain voltage of a driving transistor provided in each pixel circuit 5. The scanning line driving circuit 4 processes predetermined sampling pulses SP at a clock CK in a write scan circuit (WSCN) 4A and a drive scan circuit (DSCN) 4B to output the write signal WS and the driving signal DS, respectively.
The display unit 2 is formed by arranging the pixel circuits 5 in a matrix form. The display unit 2 has color filters of red, green and blue provided sequentially cyclically in each pixel circuit 5 and accordingly, pixels of red, green, and blue are sequentially created.
Here, in the pixel circuit 5, the cathode of an organic EL device 8 is connected to a predetermined power supply Vcath and the anode of the organic EL device 8 is connected to the source of a driving transistor Tr2. The driving transistor Tr2 is, for example, an N-channel type transistor of TFT. In the pixel circuit 5, the drain of the driving transistor Tr2 is connected to the scanning line DSL for power supply and the driving signal DS for power supply is supplied to the scanning line DSL from the scanning line driving circuit 4. Accordingly, the pixel circuit 5 drives by current the organic EL device 8 using the driving transistor Tr2 in a source follower circuit configuration.
The pixel circuit 5 has a holding capacity Cs provided between the gate and source of the driving transistor Tr2 and a gate-side voltage of the holding capacity Cs is set to the voltage of the driving signal Ssig by the write signal WS. As a result, the pixel circuit 5 drives by current the organic EL device 8 using the driving transistor Tr2 by a gate-source voltage Vgs in accordance with the driving signal Ssig. Here, in FIG. 8, a capacity Cel is a stray capacitance of the organic EL device 8. It is assumed below that the capacity Cel is sufficiently larger than the holding capacity Cs and the parasitic capacitance of the gate node of the driving transistor Tr2 is sufficiently smaller than the holding capacity Cs.
That is, in the pixel circuit 5, the gate of the driving transistor Tr2 is connected to the signal line DTL via a write transistor Tr1 switched ON/OFF by the write signal WS. Here, the write transistor Tr1 is, for example, an N-channel type transistor of TFT.
Here, the signal line driving circuit 3 outputs the driving signal Ssig by alternately repeating a gradation setting voltage Vsig and a voltage Vofs for threshold voltage correction. The fixed voltage Vofs for threshold voltage correction is a fixed voltage used for correcting fluctuation of the threshold voltage of the driving transistor Tr2. The gradation setting voltage Vsig is a voltage specifying the luminance of emission of the organic EL device 8 and is obtained by adding the fixed voltage Vofs for threshold voltage correction to a gradation voltage Vin. The gradation voltage Vin is a voltage corresponding to the luminance of emission of the organic EL device 8. The gradation voltage Vin is generated for each signal line DTL by, after the image data D1 input in order of raster scanning is latched sequentially and distributed to each signal line DTL by the horizontal selector 3A, performing digital/analog conversion processing on the image data D1.
As shown in FIG. 9, in the pixel circuit 5, the write transistor Tr1 is set to an OFF state by the write signal WS in a period of emission during which the organic EL device 8 is caused to emit light (FIG. 9A). In the pixel circuit 5, a power supply voltage Vcc is supplied to the driving transistor Tr2 by the driving signal DS for power supply in the period of emission (FIG. 9B). Accordingly, the pixel circuit 5 drives by current the organic EL device 8 by a driving current in accordance with an inter-terminal voltage of the holding capacity Cs to cause light emission in the period of emission.
In the pixel circuit 5, the driving signal DS for power supply is caused to fall to a predetermined fixed voltage Vss2 at time t0 when the period of emission ends (FIG. 9B). Here, the fixed voltage Vss2 is sufficiently low so that the drain of the driving transistor Tr2 can be caused to function as a source and is a voltage lower than the cathode voltage Vcath of the organic EL device 8.
Accordingly, in the pixel circuit 5, accumulated charges on the anode side of the organic EL device 8 flow out to the scanning line DSL via the driving transistor Tr2. As a result, in the pixel circuit 5, a source voltage Vs of the driving transistor Tr2 falls to the voltage Vss2 (FIG. 9E) and the organic EL device 8 stops emitting light. Also in the pixel circuit 5, a gate voltage Vg of the driving transistor Tr2 falls by operating together with the fall of the source voltage Vs (FIG. 9D).
In the pixel circuit 5, at a subsequent predetermined time t1, the write transistor Tr1 is changed to an ON state by the write signal WS (FIG. 9A) and the gate voltage Vg of the driving transistor Tr2 is set to the fixed voltage Vofs for threshold voltage correction set to the signal line DTL (FIGS. 9C and 9D). Accordingly, in the pixel circuit 5, the gate-source voltage Vgs of the driving transistor Tr2 is set to a voltage Vofs-Vss2. Here, in the pixel circuit 5, the voltage Vofs-Vss2 is set higher than a threshold voltage Vth of the driving transistor Tr2 based on settings of the voltages Vofs and Vss2.
Then, in the pixel circuit 5, at time t2, the drain voltage of the driving transistor Tr2 is caused to rise to the power supply voltage Vcc by the driving signal DS (FIG. 9B). Accordingly, in the pixel circuit 5, a charging current flows into the organic EL device 8 of the holding capacity Cs from the power supply Vcc via the driving transistor Tr2. As a result, in the pixel circuit 5, the voltage Vs on the side of the organic EL device 8 of the holding capacity Cs gradually rises. In this case, the current flowing into the organic EL device 8 via the driving transistor Tr2 is used only for charging of the capacity Cel and the holding capacity Cs of the organic EL device 8. As a result, in the pixel circuit 5, only the source voltage Vs of the driving transistor Tr2 rises without the organic EL device 8 being caused to emit light.
Here, in the pixel circuit 5, when the inter-terminal voltage of the holding capacity Cs becomes equal to the threshold voltage Vth of the driving transistor Tr2, the inflow of the charging current via the driving transistor Tr2 stops. Therefore, in this case, the rise of the source voltage Vs of the driving transistor Tr2 stops when the potential difference between terminals of the holding capacity Cs becomes equal to the threshold voltage Vth of the driving transistor Tr2. Accordingly, the pixel circuit 5 causes the inter-terminal voltage of the holding capacity Cs to discharge via the driving transistor Tr2 to set the inter-terminal voltage of the holding capacity Cs to the threshold voltage Vth of the driving transistor Tr2.
In the pixel circuit 5, at time t3 after passage of sufficient time to set the inter-terminal voltage of the holding capacity Cs to the threshold voltage Vth of the driving transistor Tr2, the write transistor Tr1 is switched to an OFF state by the write signal WS (FIG. 9A). Subsequently, the voltage of the signal line DTL is set to the gradation setting voltage Vsig (=Vin+Vofs).
In the pixel circuit 5, at a subsequent time t4, the write transistor Tr1 is set to an ON state (FIG. 9A). Accordingly, in the pixel circuit 5, the gate voltage Vg of the driving transistor Tr2 is set to the gradation setting voltage Vsig and the gate-source voltage Vgs of the driving transistor Tr2 to a voltage obtained by adding the threshold voltage Vth of the driving transistor Tr2 to the gradation voltage Vin. Accordingly, the pixel circuit 5 can drive the organic EL device 8 by effectively avoiding fluctuations in the threshold voltage Vth of the driving transistor Tr2 so that quality deterioration due to fluctuations in luminance of emission of the organic EL device 8 can be prevented.
When the gate voltage Vg of the driving transistor Tr2 is set to the gradation setting voltage Vsig in the pixel circuit 5, the gate of the driving transistor Tr2 is connected to the signal line DTL for a fixed period Tμ while retaining the drain voltage of the driving transistor Tr2 at the power supply voltage Vcc. Accordingly, in the pixel circuit 5, fluctuations in mobility μ of the driving transistor Tr2 is also corrected.
That is, if the gate of the driving transistor Tr2 is connected to the signal line DTL by setting the write transistor Tr1 to an ON state while the inter-terminal voltage of the holding capacity Cs is set to the threshold voltage Vth of the driving transistor Tr2, the gate voltage Vg of the driving transistor Tr2 is set to the gradation setting voltage Vsig after gradually rising from the fixed voltage Vofs.
Here, in the pixel circuit 5, the write time constant necessary for the rise of the gate voltage Vg of the driving transistor Tr2 is set such that the write time constant becomes short as compared with the time constant necessary for the rise of the source voltage Vs by the driving transistor Tr2.
In this case, when the write transistor Tr1 is turned on, the gate voltage Vg of the driving transistor Tr2 will swiftly rise to the gradation setting voltage Vsig (Vofs+Vin). If the capacity Cel of the organic EL device 8 is sufficiently larger than the holding capacity Cs during the rise of the gate voltage Vg, the source voltage Vs of the driving transistor Tr2 will not fluctuate.
However, if the gate-source voltage Vgs of the driving transistor Tr2 increases over the threshold voltage Vth, a current flows in from the power supply Vcc via the driving transistor Tr2 so that the source voltage Vs of the driving transistor Tr2 gradually rises. As a result, in the pixel circuit 5, the inter-terminal voltage of the holding capacity Cs discharges through the driving transistor Tr2, lowering the rise speed of the gate-source voltage Vgs.
The discharging speed of the inter-terminal voltage changes depending on performance of the driving transistor Tr2. More specifically, the discharging speed increases with the increasing mobility μ of the driving transistor Tr2.
As a result, the pixel circuit 5 is set so that the inter-terminal voltage of the holding capacity Cs decreases with the increasing mobility μ of the driving transistor Tr2 to correct fluctuations in luminance of emission caused by fluctuations in mobility. In FIG. 9, the fall of the inter-terminal voltage according to corrections of the mobility μ is denoted by ΔV.
In the pixel circuit 5, when the correction period Tμ of mobility passes, the write signal WS is caused to fall at time t5. As a result, the pixel circuit 5 starts the period of emission and causes the organic EL device 8 to emit light by a driving current in accordance with the inter-terminal voltage of the holding capacity Cs. When the period of emission starts, the gate voltage Vg and the source voltage Vs of the driving transistor Tr2 rises due to a so-called bootstrap circuit in the pixel circuit 5.
With these operations, the pixel circuit 5 performs preparation processing of threshold voltage correction processing of the driving transistor Tr2 in the period between time t0 and time 2 in which the gate voltage of the driving transistor Tr2 is caused to fall to the voltage Vss2. In the subsequent period between time t2 and time t3 denoted by reference numeral Tth, the threshold voltage correction processing of the driving transistor Tr2 is performed by setting the inter-terminal voltage of the holding capacity Cs to the threshold voltage Vth of the driving transistor Tr2. In the period Tμ between time t4 and time t5, the mobility of the driving transistor Tr2 is corrected and also processing to sample the gradation setting voltage Vsig is performed.
Thus, in the configuration in FIG. 8, the image display apparatus 1 sets the period of emission and the period of non-emission in which the organic EL device 8 is not caused to emit light by the driving signal DS for power supply. Therefore, the drive scan circuit 4B (FIG. 8) correspondingly outputs the drive signal DS by complementary ON/OFF control of a P-channel type transistor Tr3 and an N-channel type transistor Tr4 whose drain is connected to the predetermined voltages Vcc and Vss2. In FIG. 8, reference numeral 9 is an inverter that inputs a gate signal of the transistor Tr4 into the gate of the transistor Tr3 by inverting the gate signal.
For this type of image display apparatus, Japanese Patent Application Laid-Open No. 2007-133284 proposes a configuration in which processing to correct fluctuations in threshold voltage is performed by dividing the period Tth into a plurality of periods.